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digital-clock
- verilog实现数字钟功能，闹钟功能，日历功能-Verilog digital clock function, alarm clock function, calendar function
digital-clock
- 采用verilog语言将输出频率分频实现数字钟的基本功能：如时间显示，定点报时，整点报时，倒计时等。-Using verilog language to realize the basic function of digital clock by cut the output frequency , such as showing time, designated time,, countdown, etc.
digital-clock
- 嵌入式FPGA数字时钟，能实现时钟提示，显示功能-The embedded FPGA digital clock,
Digital-clock
- 数字时钟，单片机控制数字万年历的程序源代码。-Digital clock
digital-clock-VHDL
- 数字电子钟的VHDL硬件描述语言实现，可以用quaturs软件实现。-digital clock based on VHDL
Single-chip-digital-clock-
- 单片机实现数字时钟功能，即一个60计数器-Single-chip digital clock function, ie a 60 counter
Multi-function-digital-clock
- 1、 了解数字钟的工作原理。 2、 进一步熟悉用VHDL语言编写驱动七段码管显示的代码。 3、 掌握VHDL编写中的一些小技巧。 -1, to understand digital clock works. 2, more familiar with the use of VHDL language driver seven segment display code. 3, master VHDL prepared some of the tips.
four-key-digital-clock-of-TX-1C
- 用郭天祥TX-1C开发板写的数码管四按键时钟，调时间时会闪烁，功能还不错。-Debates TX-1C with a development board to write four key digital clock, transfer time will flash, functions well.
Digital-Clock
- 数字时钟,记得它最后的位置,初学者可下载做参考。-Digital clock, remember its last location, beginners can be downloaded for reference.
LCD-digital-clock
- 液晶数字钟，可以在液晶上精确显示时、分、秒，并且能显示年、月、日。-LCD digital clock can be displayed on the LCD on the exact hours, minutes, seconds, and can display year, month, day.
Digital-clock-design
- 数字钟设计 用VHDL实现一个50MHZ到1HZ的分频器，利用Quartus II进行文本编辑输入和仿真硬件测试。实现一个60进制和24进制的计数器。测试成功。-Digital clock design using VHDL a 50MHZ to 1HZ divider using Quartus II simulation for text input and editing hardware test. Achieve a 60 hex and 24 hex counter. Test wa
Digital-clock
- 数字时钟6位数码管显示。主要器件为74ls48和74ls160 /74ls161。功能：1.显示时、分、秒。2. 可以24小时制或12小时制。3. 具有校时功能-Digital clock six digital tube display. Main components of 74ls48 and 74ls160/74ls161. Features: 1. Shows hours, minutes, seconds. (2) a 24-hour or 12-hour clock. 3 a sc
digital-clock
- 用51单片机实现数字时钟的功能，可以显示时间，调整时间，用c语言编程-With 51 single-chip digital clock function, can display time, adjust the time, using c language programming
digital-clock
- Project of digital clock made in vhdl code.
Digital-clock
- 本程序是用QUARTUS软件设计的数字钟，采用verilog语言描述-This procedure is to use the QUARTUS software design of digital clock, using verilog language descr iption
FPGA-verilog-digital-clock
- FPGAverilog数字时钟,基于quartal ii 下的数字时钟电路程序-FPGA verilog digital clock
VHDL-based-digital-clock-programming
- 基于VHDL的数字时钟设计，可以调时间，并且可以设置四个闹钟时间，中和很多VHDL的基本程序，对初学者很有用-VHDL-based digital clock design, you can adjust the time, and you can set four alarm time, and in a lot of VHDL basic procedures, useful for beginners
digital-clock
- 51单片机数字钟程序，数码管显示时分秒，按键切换显示日期，包含闰年处理。-51 microcontroller digital clock program
Digital-Clock
- 基于51单片机的数码管显示数字钟，P0口带时分秒控制-Based on 51 single-chip digital display digital clock, P0 port with minutes and seconds control
Digital-Clock
- C52的数字时钟，是用C52单片机来做一个小时钟，精度很高。-C52 digital clock